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Pull requests: llvm/circt

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Pull requests list

[FIRRTL] Visitor: Add missing ops, fix GenericIntrinsicOp visit.
#7107 opened May 30, 2024 by dtzSiFive Loading…
[Verif] Fold disables into Property in LTLToCore verif
#7105 opened May 30, 2024 by dobios • Draft
[Verif] Allow for disable to be optional and infer it from property verif
#7104 opened May 29, 2024 by dobios Loading…
3
[MooreToCore] Support initial lowering to LLHD Moore
#7101 opened May 29, 2024 by mingzheTerapines • Draft
5
[Moore] Tweak VariableOp and ReadLValueOp . Moore
#7095 opened May 28, 2024 by hailongSun2000 • Draft
25
Flatten memref GetGlobal and Global operations
#7093 opened May 27, 2024 by jiahanxie353 Loading…
Calyx Binary Floating Point AddF Operator
#7089 opened May 26, 2024 by jiahanxie353 Loading…
8
Calyx ConstantOp Support
#7086 opened May 23, 2024 by jiahanxie353 Loading…
8
Dev/apply mem2reg Moore
#7082 opened May 23, 2024 by hailongSun2000 • Draft
15
[MooreToCore] Lower moore.variable into hw.wire. Moore
#7075 opened May 22, 2024 by hailongSun2000 Loading…
2
[FIRRTL] Enable Wire Elimination
#7073 opened May 21, 2024 by darthscsi Loading…
[Support] Print timestamp for logging
#7068 opened May 21, 2024 by uenoku Loading…
8
[Handshake] Fix canonicalizer not going through rewriter for RAUW. Handshake
#7052 opened May 16, 2024 by dtzSiFive Loading…
5
[Sim] Add DPI func/call and lowering
#7042 opened May 15, 2024 by uenoku • Draft
[HW][LTL][SV] Unify EventControl
#7037 opened May 15, 2024 by maerhart • Draft
[Moore] Improve declaration and instantiation of SVModule operation Moore
#7019 opened May 10, 2024 by cepheus69 • Draft
24
[ExportVerilog] Support sv.func.* emission
#7015 opened May 9, 2024 by uenoku Loading…
9
[ExportVerilog] Make ExportVerilog robust for HWModuleLike, NFC
#7004 opened May 8, 2024 by uenoku Loading…
6
[HW][FlattenIO] Flatten io arrays
#6996 opened May 7, 2024 by hovind • Draft
3
[FSM]New builders for StateOp and TransitionOp.
#6991 opened May 6, 2024 by HahaLan97 Loading…
[Moore] A new pass to delete local temporary variables. Moore
#6990 opened May 6, 2024 by hailongSun2000 • Draft
38
[SV][ExportVerilog] Add sv.func, sv.func.call{.procedural}, sv.func.dpi.import
#6977 opened May 1, 2024 by uenoku • Draft
6
[FIRRTL] Output directory control for layers and modules
#6971 opened Apr 30, 2024 by rwy7 Loading…
31
[Comb] Officialize support for zero-width integers
#6959 opened Apr 28, 2024 by Moxinilian Loading…
16
[LLHD] Replace entity with module LLHD
#6958 opened Apr 28, 2024 by maerhart • Draft
1
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